Stealey

From Wikipedia, the free encyclopedia
Stealey
General information
LaunchedJune 2007; 16 years ago (2007-06)
Discontinued2008; 16 years ago (2008)
Marketed byIntel
Designed byIntel
Common manufacturer(s)
  • Intel
CPUID code06dx
Product code80536
Performance
Max. CPU clock rate600 MHz to 800 MHz
FSB speeds400 MT/s
Cache
L1 cache64 KB (32 KB data + 32 KB instructions)
L2 cache512 KB
Architecture and classification
ApplicationMobile Internet Device (MID)
Ultra Mobile PC (UMPC)
Ultralight laptop
Technology node90 nm
MicroarchitectureP6 variant
Instruction setx86
InstructionsMMX, SSE, SSE2
Physical specifications
Transistors
  • 176 million
Cores
  • 1
Package(s)
  • Micro ball grid array (mPGA)
Socket(s)
  • mBGA479
Model(s)
  • Intel A100
  • Intel A110
History
Predecessor(s)Pentium M
Successor(s)Intel Atom

Stealey is the codename for a low-power x86 architecture microprocessor based on a Dothan core derived from the Intel Pentium M, built on a 90 nm process with 512 KB L2 cache and 400 MT/s front side bus (FSB). It was branded as Intel A100 and Intel A110 and appeared as part of the McCaslin platform.[1] They were replaced in 2008 by the Menlow platform, including the 45 nm Silverthorne CPU and Poulsbo SCH.[2]

The A110 runs at 800 MHz, the A100 at 600 MHz, and both have a TDP of 3 watts, and a power consumption in the lowest power state of only 0.4 watts.[3]

The A100 and A110 processors are part of the Intel Ultra Mobile Platform 2007[4] and were designed to be used in MIDs, UMPCs and Ultralight laptops.

See also[edit]

References[edit]

  1. ^ Evan Blass (2007-04-06), Intel poised to unveil new UMPC platform?, Engadget, retrieved 2008-01-25
  2. ^ Intel News Disclosures From Day 2 Of The Intel Developer Forum In Beijing, Intel, 2007-04-18, retrieved 2008-01-25
  3. ^ Intel Processor A100 and A110 on 90 nm Process with 512-KB L2 Cache (PDF), Intel, archived from the original (PDF) on 2008-02-24, retrieved 2008-01-25
  4. ^ Intel Ultra Mobile Platform 2007, Intel, retrieved 2008-01-25